Apogee Model 125 Heterogeneous Computing Platform – FPGA to HOST OS RAM DMA Transfers
The Apogee Model 125 features a PCIe GEN 3 x4 lane bus to facilitate fast and easy data transfers between the FPGA and OS RAM. The FPGA uses custom Apogee FPGA IP Core and the Xilinx DMA/Bridge Subsystem for PCI Express. A new kernel level driver provides the interface to the Apogee FPGA IP Core [&h...